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dc.contributor.authorSrinath, S.-
dc.date.accessioned2016-06-27T15:50:44Z-
dc.date.available2016-06-27T15:50:44Z-
dc.date.issued2015-
dc.identifier.urihttp://hdl.handle.net/123456789/283-
dc.description.abstractIntegrated wideband low-noise amplifiers (LNAs) are used in communication applications in which either the signal bandwidth is large or multiple narrowband signals are processed simultaneously. An example of the former case is the recently popular Ultra Wideband (UWB) wireless technology that can be used for high-data-rate low-power short-range wire- less communications. A multi-mode multi-standard wireless system is an example of the latter case. Providing large enough gain while introducing as little noise as possible over a wide fre- quency band is a challenging design task, in particular if the LNA is designed in CMOS. This report mainly focusses on the challenges that one comes across while designing a CMOS LNA, especially for UWB applications. Some applications require that the gain of the amplifier must be very high while the other applications demand minimal noise figure. Similarly, there are several applications which are concerned only about minimum power consumption. Fortunately, there are different circuits to overcome each of these challenges. However, it should be noted that any given circuit cannot satisfy all the requirements effec- tively, so the most important challenge will be to decide the trade-off between each of these factors. To demonstrate the effectiveness of the design technique, an existing UWB LNA design is simulated in 1.8V, 0.18 µm standard RFCMOS technology using ADS. The results obtained are explained and reasoned and ffnally matched with that of original design.en_US
dc.language.isoenen_US
dc.subjectElectrical Engineeringen_US
dc.titleAnalysis and Design of a CMOS Ultra Wideband Low Noise Amplifieren_US
dc.typeTechnical Reporten_US
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